This invention relates generally to integrated circuit (IC) processes and fabrication, and more particularly, a system and method for cleaning copper oxides from a copper IC surface, in-situ, to improve electrical conductivity between the copper and subsequently deposited conductive materials.
The demand for progressively smaller, less expensive, and more powerful electronic products, in turn, fuels the need for smaller geometry integrated circuits, and large substrates. It also creates a demand for a denser packaging of circuits onto IC substrates. The desire for smaller geometry IC circuits requires that the interconnections between components and dielectric layers be as small as possible. Therefore, research continues into reducing the width of via interconnects and connecting lines. The conductivity of the interconnects is reduced as the surface area of the interconnect is reduced, and the resulting increase in interconnect resistivity has become an obstacle in IC design. Conductors having high resistivity create conduction paths with high impedance and large propagation delays. These problems result in unreliable signal timing, unreliable voltage levels, and lengthy signal delays between components in the IC. Propagation discontinuities also result from intersecting conduction surfaces that are poorly connected, or from the joining of conductors having highly different impedance characteristics.
There is a need for interconnects and vias to have both low resistivity, and the ability to withstand volatile process environments. Aluminum and tungsten metals are often used in the production of integrated circuits for making interconnections or vias between electrically active areas. These metals are popular because they are easy to use in a production environment, unlike copper which requires special handling.
Copper (Cu) is a natural choice to replace aluminum in the effort to reduce the size of lines and vias in an electrical circuit. The conductivity of copper is approximately twice that of aluminum and over three times that of tungsten. As a result, the same current can be carried through a copper line having half the width of an aluminum line.
The electromigration characteristics of copper are also much superior to those of aluminum. Aluminum is approximately ten times more susceptible than copper to degradation and breakage through electromigration. As a result, a copper line, even one having a much smaller cross-section than an aluminum line, is better able to maintain electrical integrity.
There have been problems associated with the use of copper, however, in IC processing. Copper contaminates many of the materials used in IC processes and, therefore, care must be taken to keep copper from migrating. Various means have been suggested to deal with the problem of copper diffusion into integrated circuit material. Several materials, particularly refractory metals, have been suggested for use as barriers to prevent the copper diffusion process. Tungsten, molybdenum, and titanium nitride (TiN) are examples of refractory metals which may be suitable for use as copper diffusion barriers. However, the adhesion of copper to these diffusion barrier materials has been an IC process problem, and the electrical conductivity of such materials is an issue in building IC interconnects.
Metal cannot be deposited onto substrates, or into vias, using conventional metal deposition processes, such as sputtering, when the geometries of the selected IC features are small. It is impractical to sputter metal, either aluminum or copper, to fill small diameter vias, since the gap filling capability is poor. To deposit copper, various chemical vapor deposition (CVD) techniques are under development in the industry.
In a typical CVD process, copper is combined with an organic ligand to make a volatile copper compound or precursor. That is, copper is incorporated into a compound that is easily vaporized into a gas. Selected surfaces of an integrated circuit, such as diffusion barrier material, are exposed to the copper containing gas in an elevated temperature environment. When the volatile copper gas compound decomposes, copper is left behind on the heated selected surface. Several copper compounds are available for use with the CVD process. It is generally accepted that the molecular structure of the copper compound, at least partially, affects the conductivity of the copper film residue on the selected surface.
Connections between metal levels, such as copper, which are separated by dielectric interlevels, are typically formed with a damascene method of via formation between metal levels. The underlying copper film is first completely covered with the dielectric, a typical dielectric is silicon dioxide. A patterned photoresist profile is then formed over the dielectric. The resist profile has an opening, or hole, in the photoresist corresponding to the area in the dielectric where the via is to be formed. Other areas of the dielectric to be left in place are covered with photoresist. The dielectric not covered with photoresist is then etched to remove oxide underlying the hole in the photoresist. The photoresist is then stripped away. A thin film of copper, or some other metallic material, is then used to fill the via. A layer consisting of dielectric with a copper via through it now overlies the copper film. The excess copper remaining is removed with a chemical mechanical polish (CMP) process, as is well known in the art. The result is an "inlaid" or damascene structure.
The deposition of copper using a CVD process often involves the deposition of by-products on the copper surface. The copper is combined with ligands in the CVD precursor until deposition. As the copper decomposes from the precursor, ligands, or parts of ligands, may decompose in solid form, or combine with other materials in the environment, to degrade the copper film. In addition, the copper film is exposed to other IC material and etching processes which cover the film with by-products. These by-products must be removed to make a good electrical contact with subsequently deposited metal layers. As a result, these copper films must be cleaned to improve electrical conductivity, before they can be interfaced with metallic contacts in the IC.
A co-pending application, Ser. No. 08/717,267, filed Sep. 20, 1996, entitled, "Oxidized Diffusion Barrier Surface for the Adherence of Copper and Method for Same", invented by Tue Nguyen, Lawrence J. Charneski, and Lynn R. Allen, Attorney Docket No. SMT 123, which is assigned to the same Assignees as the instant patent, discloses a method for oxidizing the diffusion barrier surface to improve the adherence of copper to a diffusion barrier. In low speed electrical circuits the resistance offered by a thin level of oxide is unnoticeable. However, in higher speed applications even a small amount of resistance can increase the propagation delay of electron current across an oxide layer. The primary purpose of this, above mentioned, patent application is to improve the ability of copper to remain deposited on a surface, not on improving the conductivity between copper and another surface.
Another co-pending application, Ser. No. 08/717,315, filed Sep. 20, 1996, entitled, "Copper Adhered to a Diffusion Barrier Surface and Method for Same", invented by Lawrence J. Charneski and Tue Nguyen, Attorney Docket No. SMT 243, which is assigned to the same Assignees as the instant patent, discloses a method for using a variety of reactive gas species to improve copper adhesion without forming an oxide layer over the diffusion barrier. However, the focus of this patent is to improve copper adhesion, not to improve the conductivity of copper deposited on a surface. In addition, the method of the above patent is generally only applicable to diffusion barrier material.
Another co-pending application, Ser. No. 08/739,567, filed Oct. 11, 1996, entitled, "Chemical Vapor Deposition of Copper on an ION Prepared Conductive Surface and Method for Same," invented by Nguyen and Maa, Attorney Docket No. 114, which is assigned to the same Assignees as the instant patent, discloses a method of preparing a conductive surface, such as copper, with an exposure to the ions of an inert gas to improve electrical conductivity between a conductive surface and a subsequent deposition of copper. However, the primary purpose of this invention is to prepare a conductive surface that is substantially free of by-products and IC process debris.
It would be advantageous to employ a method of cleaning a copper IC substrate surface while minimally exposing the surface to oxygen, to suppress the formation of copper oxides on the surface.
It would be advantageous to employ a method of cleaning an IC substrate to selectively remove only copper oxides from a copper conductive surface, minimizing the removal of copper from the copper conductive surface.
It would be advantageous if a selective copper cleaning process used the vapor of a room temperature liquid which could be easily delivered into an IC process system to volatilize copper oxides. In this manner, the IC would not have to be removed from the chamber for cleaning and exposure to an oxygen atmosphere.
Accordingly, in an integrated circuit having a dielectric interlevel with a dielectric surface, and a plurality of metal levels underlying the dielectric interlevel, a method for selectively cleaning metal oxides, in-situ, from a surface on a first metal level, accessed through a via from the dielectric surface, is provided. The method comprises the steps of:
a) providing an atmosphere surrounding the integrated circuit; PA1 c) introducing a .beta.-diketone vapor into the atmosphere; and PA1 d) volatilizing the metal oxidizes from the first metal level surface using the .beta.-diketone vapor introduced in step c). A minimal amount of material is removed from the first metal level surface in preparation for an electrical connection with subsequently deposited metal levels.
b) controlling the atmosphere to be substantially free of oxygen, whereby the formation of metal oxides on the first metal level surface is minimized;
Typically, the first metal level surface is a metal selected from the group consisting of copper and silver. In one aspect of the invention, step c) includes using hexafluoroacetylacetonate (Hhfac) as the .beta.-diketone to volatilize the oxides on the conductive interlevel connection surface.
In another aspect of the invention step c) includes delivering the Hhfac at a pressure of less than approximately 85 Torr and a temperature of approximately 20.degree. C. The method typically includes the further step, following step d), of creating a vacuum to remove the volatile metal oxides obtained in step d) from the atmosphere. The volatile cleaning by-products are easily removed from the area of the IC by creating a vacuum.
Another aspect of the invention includes the further step, before step c), of controlling the IC temperature to be in the range between 100.degree. C. and 450.degree. C. The method includes the further step, following step d), of, while maintaining the atmosphere established in step b), depositing a second metal level overlying the first metal level surface to electrically interface to the first metal level. A cleaning process facilitates a low resistance electrical connection. The second metal level is a metal selected from the group consisting of TiN, TiSi.sub.x N.sub.y, TaSi.sub.x N.sub.y, TaN, WN, WSi.sub.x N.sub.y, Ti, Ta, W, Cu, Al, Ag, andAu.
An integrated circuit is also provided comprising a dielectric interlevel with a dielectric surface, and a plurality of metal levels underlying the dielectric interlevel. The integrated circuit further comprises a via from the dielectric surface to a first metal level, and a surface on the first interlevel. The first metal level surface is accessed from the dielectric surface through the via. The first metal level surface is prepared for subsequent overlying metal depositions with a process for the selective, in-situ, cleaning the first metal level surface of metal oxides with a .beta.-diketone vapor, in an atmosphere free of oxygen. The metal oxides are removed with a minimal loss of the first metal level surface.
In an integrated circuit, including a dielectric interlevel with a dielectric surface, and a plurality of metal levels underlying the dielectric interlevel, a system for the selective, in-situ, cleaning of metal oxides from a surface on a first metal level, accessed through a via from the dielectric surface to the first metal level, is provided. The system comprises a chamber to control an atmosphere to be substantially free of oxygen, whereby the formation of metal oxides on the first metal level surface is minimized. The system also comprises a bubbler to introduce a .beta.-diketone vapor into the chamber, and a wafer chuck located inside the chamber and upon which the IC is mounted. The wafer chuck has a predetermined temperature to control the temperature of the IC, whereby the .beta.-diketone volatilizes metal oxides on the surface of the first metal, in preparation for electrical connection to subsequently deposited metal levels.